Design optimization of band-pass filter based on parity-time symmetry coupled-resonant

TL;DR

This paper presents a novel design for a PT-symmetry based band-pass filter that achieves high bandwidth-tunable contrast ratio and low insertion loss simultaneously by optimizing coupling strength, advancing integrated optical filtering technology.

Contribution

It introduces a method to enhance bandwidth-tunable contrast ratio and reduce insertion loss in PT-symmetry coupled-resonant filters through coupling strength optimization.

Findings

High bandwidth-tunable contrast ratio achieved

Low insertion loss obtained at over-coupling condition

Effective on-chip tunable filter demonstrated on Silicon platform

Abstract

Integrated optical filter based on microring resonators plays a critical role in many applications, ranging from wavelength division multiplexing and switching to channel routing. Bandwidth tunable filters are capable of meeting the on-demand flexible operations in complex situations, due to their advantages of scalability, multi-function, and energy-saving. It has been investigated recently that parity-time (PT) symmetry coupled-resonant systems can be applied to the bandwidth-tunable filters. However, due to the trade-off between the bandwidth-tunable contrast ratio and insertion loss of system, the bandwidth-tunable contrast ratio of this method is severely limited. Here, the bandwidth-tunable contrast ratio is defined as the maximum bandwidth divided by the minimum bandwidth. In this work, we show that high bandwidth-tunable contrast ratio and low insertion loss of system can be achieved simultaneously by increasing the coupling strength between the input port and the resonant. System characterizations under different coupling states reveal that the low insertion loss can be obtained when the system initially operates at the over-coupling condition. A high bandwidth-tunable contrast ratio PT-symmetry band-pass filter with moderate insertion loss is shown on the Silicon platform. Our scheme provides an effective method to reduce the insertion loss of on-chip tunable filters, which is also applicable to the high-order cascaded microring systems.