Hardware Acceleration for Third-Generation FHE and PSI Based on It

TL;DR

This paper presents the first hardware acceleration architecture for third-generation Fully Homomorphic Encryption (FHE) using AWS FPGAs, significantly improving performance for FHE and PSI protocols.

Contribution

It introduces a novel FPGA-based hardware architecture for third-generation FHE and a new unbalanced PSI protocol optimized for this architecture, with co-optimization techniques.

Findings

Achieves over 21x performance improvement over software implementations.

First hardware acceleration solution for third-generation FHE.

Optimized communication and computation costs independent of set size.

Abstract

With the expansion of cloud services, serious concerns about the privacy of users' data arise due to the exposure of the unencrypted data to the server during computation. Various security primitives are under investigation to preserve privacy while evaluating private data, including Fully Homomorphic Encryption (FHE), Private Set Intersection (PSI), and others. However, the prohibitive processing time of these primitives hinders their practical applications. This work proposes and implements an architecture for accelerating third-generation FHE with Amazon Web Services (AWS) cloud FPGAs, marking the first hardware acceleration solution for third-generation FHE. We also introduce a novel unbalanced PSI protocol based on third-generation FHE, optimized for the proposed hardware architecture. Several algorithm-architecture co-optimization techniques are introduced to allow the communication and computation costs to be independent of the Sender's set size. The measurement results show that the proposed accelerator achieves $>21\times$ performance improvement compared to a software implementation for various crucial subroutines of third-generation FHE and the proposed PSI.