A gate-programmable van der Waals metal-ferroelectric-semiconductor memory

TL;DR

This paper demonstrates a gate-programmable van der Waals memory device using layered materials, exhibiting high on-off ratios and ferroelectric-controlled memristive behavior, advancing nanoelectronic memory technology.

Contribution

It introduces a novel gate-tunable ferroelectric vdW memristive device with a three-terminal configuration, enabling programmable nonvolatile memory functionalities.

Findings

Devices show on-off ratios exceeding 10^5.

Long-term data retention demonstrated.

Gate control modulates memristive behavior via Fermi level tuning.

Abstract

Ferroelecticity, one of the keys to realize nonvolatile memories owing to the remanent electric polarization, has been an emerging phenomenon in the two-dimensional (2D) limit. Yet the demonstrations of van der Waals (vdW) memories using 2D ferroelectric materials as an ingredient are very limited. Especially, gate-tunable ferroelectric vdW memristive device, which holds promises in future neuromorphic applications, remains challenging. Here, we show a prototype gate-programmable memory by vertically assembling graphite, CuInP2S6, and MoS2 layers into a metal-ferroelectric-semiconductor architecture. The resulted devices exhibit two-terminal switchable electro-resistance with on-off ratios exceeding 105 and long-term retention, akin to a conventional memristor but strongly coupled to the ferroelectric characteristics of the CuInP2S6 layer. By controlling the top gate, Fermi level of MoS2 can be set inside (outside) of its band gap to quench (enable) the memristive behaviour, yielding a three-terminal gate programmable nonvolatile vdW memory. Our findings pave the way for the engineering of ferroelectric-mediated memories in future implementations of nanoelectronics.