Structural engineering of transition-metal nitrides for surface-enhanced Raman scattering chips

TL;DR

This paper presents a general method for fabricating noble-metal-free transition-metal nitride SERS chips with high enhancement factors through structural engineering and heterostructure design, advancing practical applications.

Contribution

It introduces a versatile ambient temperature sputtering process to create high-performance TMN SERS chips and demonstrates structural modifications to significantly boost their sensitivity.

Findings

Planar TMN chips achieve ~10^5 enhancement factors.

Nanocavity structures increase EF to 1.29 * 10^7.

Heterostructure chips reach EF of 1.94 * 10^7 with ultra-low detection limits.

Abstract

Noble-metal-free surface-enhanced Raman scattering (SERS) substrates have attracted great attention for their abundant sources, good signal uniformity, superior biocompatibility, and high chemical stability. However, the lack of controllable synthesis and fabrication of noble-metal-free substrates with high SERS activity impedes their practical applications. Herein,we propose a general strategy to fabricate a series of planar transition-metal nitride (TMN) SERS chips via an ambient temperature sputtering deposition route.These planar TMN (tungsten nitride, tantalum nitride, and molybdenum nitride) chips show remarkable Raman enhancement factors (EFs) with ~105 owing to efficient photoinduced charge transfer process between TMN chips and probe molecules. Further, structural engineering of these TMN chips is used to improve their SERS activity. Benefiting from the synergistic effect of charge transfer process and electric field enhancement by constructing nanocavity structure, the Raman EF of WN nanocavity chips could be greatly improved to 1.29 * 107, which is an order of magnitude higher than that of planar chips. Moreover, we also design the WN/monolayer MoS2 heterostructure chips. With the increase of surface electron density on the upper WN and more exciton resonance transitions in the heterostructure, a 1.94 * 107 level EF and a 5 * 10-10 m level detention limit could be achieved. Our results provide important guidance for the structural design of ultrasensitive noble-metal-free SERS chips.