Towards Comparing Performance of Algorithms in Hardware and Software

TL;DR

This paper investigates the potential performance improvements of FPGA implementations using high-level language compared to traditional software on general-purpose and small computers, using Conway's Game of Life as a case study.

Contribution

It demonstrates a preliminary comparison of FPGA versus software implementations for a highly parallelizable program, highlighting potential performance gains.

Findings

FPGA implementation shows potential for significant performance gains.

Parallelizable programs benefit more from FPGA acceleration.

Performance varies with input size and hardware used.

Abstract

In this paper, we report on a preliminary investigation of the potential performance gain of programs implemented in field-programmable gate arrays (FPGAs) using a high-level language Chisel compared to ordinary high-level software implementations executed on general-purpose computers and small and cheap computers. FPGAs inherently support parallel evaluations, while sequential computers do not. For this preliminary investigation, we have chosen a highly parallelizable program as a case study to show an upper bound of performance gain. The purpose is to demonstrate whether or not programming FPGAs has the potential for performance optimizations of ordinary programs. We have developed and evaluated Conway's Game of Life for an FPGA, a small and cheap computer Raspberry Pi 4, and a MacBook Pro Laptop. We have compared the performance of programs over different input sizes to decide the relative increase in runtime.