A Design Methodology for Fault-Tolerant Computing using Astrocyte Neural Networks

TL;DR

This paper presents a novel fault-tolerant design methodology for deep learning models using astrocyte-inspired neural networks and neuromorphic hardware, enhancing robustness and efficiency through bio-inspired self-repair mechanisms.

Contribution

It introduces a new fault-tolerant neuromorphic hardware design with astrocyte circuitry and integrates astrocytes into deep learning models for improved fault tolerance.

Findings

Achieves fault tolerance with minimal area overhead.

Demonstrates power efficiency in fault-tolerant models.

Validates methodology across seven deep learning inference models.

Abstract

We propose a design methodology to facilitate fault tolerance of deep learning models. First, we implement a many-core fault-tolerant neuromorphic hardware design, where neuron and synapse circuitries in each neuromorphic core are enclosed with astrocyte circuitries, the star-shaped glial cells of the brain that facilitate self-repair by restoring the spike firing frequency of a failed neuron using a closed-loop retrograde feedback signal. Next, we introduce astrocytes in a deep learning model to achieve the required degree of tolerance to hardware faults. Finally, we use a system software to partition the astrocyte-enabled model into clusters and implement them on the proposed fault-tolerant neuromorphic design. We evaluate this design methodology using seven deep learning inference models and show that it is both area and power efficient.