Systematic Unsupervised Recycled Field-Programmable Gate Array Detection

TL;DR

This paper introduces an unsupervised anomaly detection approach for identifying recycled FPGAs by analyzing ring oscillator frequencies without relying on known fresh FPGA data, improving detection accuracy.

Contribution

It presents a novel unsupervised detection method that does not depend on known fresh FPGA samples, utilizing direct density ratio estimation for outlier detection.

Findings

Successfully distinguishes recycled FPGAs from 35 fresh FPGAs

Outperforms conventional methods with fewer misclassifications

Effective in scenarios with limited or no known fresh FPGA data

Abstract

With the expansion of the semiconductor supply chain, the use of recycled field-programmable gate arrays (FPGAs) has become a serious concern. Several methods for detecting recycled FPGAs by analyzing the ring oscillator (RO) frequencies have been proposed; however, most assume the known fresh FPGAs (KFFs) as the training data in machine-learning-based classification. In this study, we propose a novel recycled FPGA detection method based on an unsupervised anomaly detection scheme when there are few or no KFFs available. As the RO frequencies in the neighboring logic blocks on an FPGA are similar because of systematic process variation, our method compares the RO frequencies and does not require KFFs. The proposed method efficiently identifies recycled FPGAs through outlier detection using direct density ratio estimation. Experiments using Xilinx Artix-7 FPGAs demonstrate that the proposed method successfully distinguishes recycled FPGAs from 35 fresh FPGAs. In contrast, a conventional recycled FPGA detection method results in certain misclassification.