Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems
Christina Giannoula, Ivan Fernandez, Juan G\'omez-Luna, Nectarios, Koziris, Georgios Goumas, Onur Mutlu

TL;DR
This paper analyzes the performance of Sparse Matrix Vector Multiplication on real-world Processing-In-Memory systems and introduces SparseP, the first optimized library for such architectures, providing valuable insights for hardware and software design.
Contribution
It presents the first comprehensive analysis of SpMV on a real PIM system and introduces SparseP, an optimized library tailored for PIM architectures.
Findings
Efficient SpMV algorithms for diverse sparse matrices.
Insights into PIM architecture performance for SpMV.
Open-source SparseP library for real PIM systems.
Abstract
Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks and can yield significant performance and energy improvements in parallel applications by alleviating data access costs. Real PIM systems can provide high levels of parallelism, large aggregate memory bandwidth and low memory access latency, thereby being a good fit to accelerate the widely-used, memory-bound Sparse Matrix Vector Multiplication (SpMV) kernel. This paper provides the first comprehensive analysis of SpMV on a real-world PIM architecture, and presents SparseP, the first SpMV library for real PIM architectures. We make two key contributions. First, we design efficient SpMV algorithms to accelerate the SpMV kernel in current and future PIM systems, while covering a wide variety of sparse matrices…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Advanced Data Storage Technologies · Interconnection Networks and Systems
