Low power In Memory Computation with Reciprocal Ferromagnet/Topological Insulator Heterostructures

TL;DR

This paper proposes a low-power in-memory computing architecture using reciprocal ferromagnet/topological insulator heterostructures, leveraging spin-momentum locking and gate tunability for energy-efficient memory and processing.

Contribution

It introduces a novel 1T1MTJ RAM design based on FM/3DTI heterostructures, combining advanced modeling techniques to connect device performance with material properties.

Findings

Potential for ultra low power operation

Gate tunability reduces sub-threshold swing

Device performance linked to material parameters

Abstract

The surface state of a 3D topological insulator (3DTI) is a spin-momentum locked conductive state, whose large spin hall angle can be used for the energy-efficient spin orbit torque based switching of an overlying ferromagnet (FM). Conversely, the gated switching of the magnetization of a separate FM in or out of the TI surface plane, can turn on and off the TI surface current. The gate tunability of the TI Dirac cone gap helps reduce its sub-threshold swing. By exploiting this reciprocal behaviour, we can use two FM/3DTI heterostructures to design a 1-Transistor 1-magnetic tunnel junction random access memory unit (1T1MTJ RAM) for an ultra low power Processing-in-Memory (PiM) architecture. Our calculation involves combining the Fokker-Planck equation with the Non-equilibrium Green Function (NEGF) based flow of conduction electrons and Landau-Lifshitz-Gilbert (LLG) based dynamics of magnetization. Our combined approach allows us to connect device performance metrics with underlying material parameters, which can guide proposed experimental and fabrication efforts.