Deep Bidirectional Transformers for SoC Flow Specification Mining

TL;DR

This paper introduces a novel attention-based method for mining accurate system-on-chip (SoC) message flow specifications from complex, highly interleaved communication traces, improving over existing tools.

Contribution

It presents a disruptive attention mechanism approach that effectively handles concurrency and parallelism in SoC trace data for flow specification mining.

Findings

Outperforms existing tools in flow reconstruction accuracy

Effectively manages concurrency and parallelism in complex traces

Shows promising results on highly interleaved traces

Abstract

High-quality system-level message flow specifications can lead to comprehensive validation of system-on-chip (SoC) designs. We propose a disruptive method that utilizes an attention mechanism to produce accurate flow specifications from SoC IP communication traces. The proposed method can overcome the inherent complexity of SoC traces induced by the concurrency and parallelism of multicore designs that existing flow specification mining tools often find extremely challenging. Experiments on highly interleaved traces show promising flow reconstruction compared to several tools dedicated to the flow specification mining problem.