A Primer for Telemetry Interfacing in Accordance with NASA Standards Using Low Cost FPGAs

TL;DR

This paper presents a low-cost FPGA-based telemetry interface for asynchronous photon counting detectors on sounding rockets, emphasizing minimal custom hardware and compliance with NASA standards.

Contribution

It demonstrates how to implement a telemetry interface using low-cost FPGAs and minimal additional hardware, suitable for space applications.

Findings

Successful implementation of FPGA-based TM interface

Low power consumption achieved with commercial off-the-shelf components

System tested with simulated telemetry chain

Abstract

Photon counting detector systems on sounding rocket payloads often require interfacing asynchronous outputs with a synchronously clocked telemetry (TM) stream. Though this can be handled with an on-board computer, there are several low cost alternatives including custom hardware, microcontrollers and field-programmable gate arrays (FPGAs). This paper outlines how a TM interface (TMIF) for detectors on a sounding rocket with asynchronous parallel digital output can be implemented using low cost FPGAs and minimal custom hardware. Low power consumption and high speed FPGAs are available as commercial off-the-shelf (COTS) products and can be used to develop the main component of the TMIF. Then, only a small amount of additional hardware is required for signal buffering and level translating. This paper also discusses how this system can be tested with a simulated TM chain in the small laboratory setting using FPGAs and COTS specialized data acquisition products.