Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics

TL;DR

This paper explores bulk-bitwise processing-in-memory (PIM) for database analytics, demonstrating significant performance and energy efficiency improvements through a memristive system called PIMDB, evaluated via detailed simulations.

Contribution

It introduces PIMDB, a digital memristive PIM system for database analytics, with new techniques for in-memory filtering and aggregation, and a programming model supporting virtual memory.

Findings

Accelerates TPC-H queries by up to 608×

Reduces energy consumption by up to 18.6×

Maintains cell endurance within existing RRAM limits

Abstract

Bulk-bitwise processing-in-memory (PIM), where large bitwise operations are performed in parallel by the memory array itself, is an emerging form of computation with the potential to mitigate the memory wall problem. This paper examines the capabilities of bulk-bitwise PIM by constructing PIMDB, a fully-digital system based on memristive stateful logic, utilizing and focusing on in-memory bulk-bitwise operations, designed to accelerate a real-life workload: analytical processing of relational databases. We introduce a host processor programming model to support bulk-bitwise PIM in virtual memory, develop techniques to efficiently perform in-memory filtering and aggregation operations, and adapt the application data set into the memory. To understand bulk-bitwise PIM, we compare it to an equivalent in-memory database on the same host system. We show that bulk-bitwise PIM substantially lowers the number of required memory read operations, thus accelerating TPC-H filter operations by 1.6$\times$--18$\times$ and full queries by 56$\times$--608$\times$, while reducing the energy consumption by 1.7$\times$--18.6$\times$ and 0.81$\times$--12$\times$ for these benchmarks, respectively. Our extensive evaluation uses the gem5 full-system simulation environment. The simulations also evaluate cell endurance, showing that the required endurance is within the range of existing endurance of RRAM devices.