Scalable, Highly Crystalline, 2D Semiconductor Atomic Layer Deposition Process for High Performance Electronic Applications

TL;DR

This paper introduces a scalable atomic layer deposition process for large-area, high-quality 2D semiconductors, enabling uniform growth, tunability, and high-performance flexible electronic devices including transistors and memory elements.

Contribution

The work presents a novel ALD method for uniform, large-area 2D TMDC growth with independent control over properties, advancing their integration into flexible electronics.

Findings

Achieved field effect mobility up to 55 cm^2/Vs in flexible FETs

Demonstrated ferroelectric FETs with on/off ratio of 10^7 and memory window of 3.25 V

Enabled uniform large-area growth of 2D TMDCs with tunable properties

Abstract

This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required for their commercial uptake. The new atomic layer deposition (ALD) and conversion technique yields large area performance uniformity and tunability. Like graphene, 2D Transition Metal Dichalcogenides (TMDCs) are prone to upscaling challenges limiting their commercial uptake. They are challenging to grow uniformly on large substrates and to transfer on alternative substrates while they often lack in large area electrical performance uniformity. The scalable ALD process of this work enables uniform growth of 2D TMDCs on large area with independent control of layer thickness, stoichiometry and crystallinity while allowing chemical free transfers to application substrates. Field effect transistors (FETs) fabricated on flexible substrates using the process present a field effect mobility of up to 55 cm^2/Vs, subthreshold slope down to 80 mV/dec and on/off ratios of 10^7. Additionally, non-volatile memory transistors using ferroelectric FETs (FeFETs) operating at +-5 V with on/off ratio of 107 and a memory window of 3.25 V are demonstrated. These FeFETs demonstrate state-of-the-art performance with multiple state switching, suitable for one-transistor non-volatile memory and for synaptic transistors revealing the applicability of the process to flexible neuromorphic applications.