Automated Design Approximation to Overcome Circuit Aging
Konstantinos Balaskas, Georgios Zervakis, Hussam Amrouch, Joerg, Henkel, Kostas Siozios

TL;DR
This paper introduces an automated framework that uses approximate computing to generate aging-aware circuits, effectively eliminating aging-induced timing errors and significantly reducing the need for guardbands, thereby improving circuit longevity and performance.
Contribution
It presents the first automated method for designing aging-aware approximate circuits that mitigate delay degradation due to aging effects.
Findings
Eliminates aging-induced timing errors in tested circuits.
Reduces error by a factor of 1208x compared to baseline circuits.
Achieves this with an average functional error of only 0.005.
Abstract
Transistor aging phenomena manifest themselves as degradations in the main electrical characteristics of transistors. Over time, they result in a significant increase of cell propagation delay, leading to errors due to timing violations, since the operating frequency becomes unsustainable as the circuit ages. Conventional techniques employ timing guardbands to mitigate aging-induced delay increase, which leads to considerable performance losses from the beginning of the circuit's lifetime. Leveraging the inherent error resilience of a vast number of application domains, approximate computing was recently introduced as an aging mitigation mechanism. In this work, we present the first automated framework for generating aging-aware approximate circuits. Our framework, by applying directed gate-level netlist approximation, induces a small functional error and recovers the delay degradation…
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