Fabrication of quantum Hall p-n junction checkerboards
Dinesh K. Patel, Martina Marzano, Chieh-I Liu, Mattias Kruskopf,, Randolph E. Elmquist, Chi-Te Liang, Albert F. Rigosi

TL;DR
This paper reports the fabrication and testing of quantum Hall p-n junction checkerboard devices in graphene, demonstrating quantized resistance and potential for scalable manufacturing using standard lithography.
Contribution
It introduces a novel quantum Hall p-n junction checkerboard device fabricated with standard lithography, showing quantized resistance and scalable fabrication potential.
Findings
Quantized Hall resistance observed at fractional multiples of the { u}=2 plateau.
Device outputs match numerical simulations with LTspice.
Scalability of fabrication on larger scales is feasible with UV lithography.
Abstract
Measurements of fractional multiples of the {\nu}=2 plateau quantized Hall resistance (R_H {\approx} 12906 {\Omega}) were enabled by the utilization of multiple current terminals on millimetre-scale graphene p-n junction devices fabricated with interfaces along both lateral directions. These quantum Hall resistance checkerboard devices have been demonstrated to match quantized resistance outputs numerically calculated with the LTspice circuit simulator. From the devices' functionality, more complex embodiments of the quantum Hall resistance checkerboard were simulated to highlight the parameter space within which these devices could operate. Moreover, these measurements suggest that the scalability of p-n junction fabrication on millimetre or centimetre scales is feasible with regards to graphene device manufacturing by using the far more efficient process of standard ultraviolet…
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Taxonomy
TopicsQuantum and electron transport phenomena · Advancements in Semiconductor Devices and Circuit Design · Graphene research and applications
