Superconducting-semiconducting voltage-tunable qubits in the third dimension

TL;DR

This paper introduces a novel superconducting-semiconducting qubit design using through-silicon vias to reduce electric field loss and enable tunable qubit interactions without magnetic fields, enhancing scalability and performance.

Contribution

The work presents a new qubit architecture employing TSVs for electric field management and tunability, advancing super-semi qubit integration and multi-qubit system scalability.

Findings

TSV-based probe wafer reduces electric field participation by an order of magnitude.

Design enables tunable qubit-qubit coupling without magnetic fields.

Approach maintains low electric field loss even with thick epitaxial layers.

Abstract

We propose superconducting-semiconducting (super-semi) qubit and coupler designs based on high-quality, compact through-silicon vias (TSVs). An interposer "probe" wafer containing TSVs is used to contact a sample wafer with, for example, a superconductor-proximitized, epitaxially-grown, germanium quantum well. By utilizing the capacitance of the probe wafer TSVs, the majority of the electric field in the qubits is pulled away from lossy regions in the semiconducting wafer. Through simulations, we find that the probe wafer can reduce the qubit's electric field participation in the sample wafer by an order of magnitude for thin substrates and remains small even when the epitaxial layer thickness approaches 100 $\mu$m. We also show how this scheme is extensible to multi-qubit systems which have tunable qubit-qubit couplings without magnetic fields. This approach shrinks the on-chip footprint of voltage-tunable superconducting qubits and promises to accelerate the understanding of super-semi heterostructures in a variety of systems.