Partitioning Dense Graphs with Hardware Accelerators

TL;DR

This paper explores the use of specialized hardware, specifically the Fujitsu Digital Annealer, for partitioning dense graphs, comparing its performance with traditional solvers and highlighting limitations and potential hybrid solutions.

Contribution

It demonstrates the application of a quantum-inspired accelerator to graph partitioning and analyzes its limitations relative to existing solvers on various graph types.

Findings

Digital Annealer outperforms traditional solvers on dense graphs

Existing solvers struggle with dense graph partitioning

Hybrid approaches may overcome current limitations

Abstract

Graph partitioning is a fundamental combinatorial optimization problem that attracts a lot of attention from theoreticians and practitioners due to its broad applications. From multilevel graph partitioning to more general-purpose optimization solvers such as Gurobi and CPLEX, a wide range of approaches have been developed. Limitations of these approaches are important to study in order to break the computational optimization barriers of this problem. As we approach the limits of Moore's law, there is now a need to explore ways of solving such problems with special-purpose hardware such as quantum computers or quantum-inspired accelerators. In this work, we experiment with solving the graph partitioning on the Fujitsu Digital Annealer (a special-purpose hardware designed for solving combinatorial optimization problems) and compare it with the existing top solvers. We demonstrate limitations of existing solvers on many dense graphs as well as those of the Digital Annealer on sparse graphs which opens an avenue to hybridize these approaches.