A line code with quick-resynchronization capability and low latency for the optical data links of LHC experiments

TL;DR

This paper introduces a novel line code with rapid resynchronization and low latency for optical data links in LHC experiments, implemented in FPGA and ASIC, enhancing synchronization recovery and reducing delay.

Contribution

It presents a new line code with fast resynchronization and low latency, suitable for high-energy physics experiments, with FPGA and ASIC implementations.

Findings

Latency less than 73.9 ns for the optical link

Decoder can recover synchronization in 25 ns after loss

Applicable to ATLAS calorimeter upgrade and other LHC experiments

Abstract

We propose a line code that has fast resynchronization capability and low latency. Both the encoder and decoder have been implemented in FPGAs. The encoder has also been implemented in an ASIC. The latency of the whole optical link (not including the optical fiber) is estimated to be less than 73.9 ns. In the case of radiation-induced link synchronization loss, the decoder can recover the synchronization in 25 ns. The line code will be used in the ATLAS liquid argon calorimeter Phase-I trigger upgrade and can also be potentially used in other LHC experiments.