Fabrication of Surface Ion Traps with Integrated Current Carrying Wires enabling High Magnetic Field Gradients

TL;DR

This paper reports the fabrication of surface ion traps with embedded current-carrying wires capable of generating high magnetic field gradients, advancing scalable quantum gate implementation in trapped ion quantum computers.

Contribution

It introduces a novel fabrication method for surface ion traps with integrated copper wires that produce high magnetic field gradients suitable for quantum computing.

Findings

Copper layer has low sheet resistance suitable for high currents.

Continuous currents of 13 A generate a magnetic gradient of 144 T/m.

The design enables scalable quantum gate operations with high magnetic field gradients.

Abstract

A major challenge for quantum computers is the scalable simultaneous execution of quantum gates. One approach to address this in trapped ion quantum computers is the implementation of quantum gates based on static magnetic field gradients and global microwave fields. In this paper, we present the fabrication of surface ion traps with integrated copper current carrying wires embedded inside the substrate below the ion trap electrodes, capable of generating high magnetic field gradients. The copper layer's measured sheet resistance of 1.12 m$\Omega$/sq at room temperature is sufficiently low to incorporate complex designs, without excessive power dissipation at high currents causing a thermal runaway. At a temperature of 40 K the sheet resistance drops to 20.9 $\mu\Omega$/sq giving a lower limit for the residual resistance ratio of 100. Continuous currents of 13 A can be applied, resulting in a simulated magnetic field gradient of 144 T/m at the ion position, which is 125 $\mu$m from the trap surface for the particular anti-parallel wire pair in our design.