Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals
Weidong Cao, Yilong Zhao, Adith Boloor, Yinhe Han, Xuan Zhang, Li, Jiang

TL;DR
Neural-PIM introduces a novel RRAM-based processing-in-memory architecture that reduces energy consumption and increases throughput for deep learning tasks by minimizing A/D conversions through analog accumulation and neural approximation techniques.
Contribution
It proposes a new dataflow and neural approximation methods to significantly enhance PIM efficiency, addressing A/D conversion bottlenecks in existing architectures.
Findings
Energy efficiency improved by 5.36x
Throughput increased by 3.43x
Maintains accuracy comparable to state-of-the-art
Abstract
Processing-in-memory (PIM) architectures have demonstrated great potential in accelerating numerous deep learning tasks. Particularly, resistive random-access memory (RRAM) devices provide a promising hardware substrate to build PIM accelerators due to their abilities to realize efficient in-situ vector-matrix multiplications (VMMs). However, existing PIM accelerators suffer from frequent and energy-intensive analog-to-digital (A/D) conversions, severely limiting their performance. This paper presents a new PIM architecture to efficiently accelerate deep learning tasks by minimizing the required A/D conversions with analog accumulation and neural approximated peripheral circuits. We first characterize the different dataflows employed by existing PIM accelerators, based on which a new dataflow is proposed to remarkably reduce the required A/D conversions for VMMs by extending shift and…
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Taxonomy
MethodsSPEED: Separable Pyramidal Pooling EncodEr-Decoder for Real-Time Monocular Depth Estimation on Low-Resource Settings
