Spintronics-compatible approach to solving maximum satisfiability problems with probabilistic computing, invertible logic and parallel tempering

TL;DR

This paper proposes a novel spintronic-based hardware approach combining probabilistic computing, invertible logic, and parallel tempering to efficiently solve NP-hard Max-SAT problems, demonstrating theoretical feasibility and benchmarking results.

Contribution

It introduces a scalable, spintronic implementation of probabilistic Max-SAT solving using coupled Landau-Lifshitz-Gilbert equations, integrating invertible logic and parallel tempering.

Findings

Theoretical demonstration of spintronic implementation for Max-SAT solving.

Potential for energy-efficient, fast architecture with nanosecond switching.

Benchmarking on hard Max-SAT instances shows promising performance.

Abstract

The search of hardware-compatible strategies for solving NP-hard combinatorial optimization problems (COPs) is an important challenge of today s computing research because of their wide range of applications in real world optimization problems. Here, we introduce an unconventional scalable approach to face maximum satisfiability problems (Max-SAT) which combines probabilistic computing with p-bits, parallel tempering, and the concept of invertible logic gates. We theoretically show the spintronic implementation of this approach based on a coupled set of Landau-Lifshitz-Gilbert equations, showing a potential path for energy efficient and very fast (p-bits exhibiting ns time scale switching) architecture for the solution of COPs. The algorithm is benchmarked with hard Max-SAT instances from the 2016 Max-SAT competition (e.g., HG-4SAT-V150-C1350-1.cnf which can be described with 2851 p-bits), including weighted Max-SAT and Max-Cut problems.