TriLock: IC Protection with Tunable Corruptibility and Resilience to SAT and Removal Attacks

TL;DR

TriLock introduces a tunable, resilient sequential logic locking technique that enhances protection against SAT-based and removal attacks by obscuring circuit structure and maintaining high corruptibility.

Contribution

It proposes TriLock, a novel logic locking method that offers tunable corruptibility and structural obfuscation to resist advanced attack strategies.

Findings

Achieves high, tunable functional corruptibility.

Ensures exponential queries in SAT-based attacks.

Obscures boundary between original and inserted state registers.

Abstract

Sequential logic locking has been studied over the last decade as a method to protect sequential circuits from reverse engineering. However, most of the existing sequential logic locking techniques are threatened by increasingly more sophisticated SAT-based attacks, efficiently using input queries to a SAT solver to rule out incorrect keys, as well as removal attacks based on structural analysis. In this paper, we propose TriLock, a sequential logic locking method that simultaneously addresses these vulnerabilities. TriLock can achieve high, tunable functional corruptibility while still guaranteeing exponential queries to the SAT solver in a SAT-based attack. Further, it adopts a state re-encoding method to obscure the boundary between the original state registers and those inserted by the locking method, thus making it more difficult to detect and remove the locking-related components.