Calipers: A Criticality-aware Framework for Modeling Processor Performance
Hossein Golestani, Rathijit Sen, Vinson Young, Gagan Gupta

TL;DR
Calipers is a framework that models processor performance using dynamic graphs to analyze dependencies, enabling rapid exploration of architecture design choices with lower effort and comparable accuracy to cycle-accurate simulators.
Contribution
It introduces a criticality-aware graph-based modeling framework that allows flexible, efficient analysis of complex processor architectures and ISA choices during early design stages.
Findings
Targeting critical loads improves value prediction benefits.
Calipers achieves comparable accuracy to cycle-accurate simulators.
Enables rapid 'what-if' scenario analysis without recompilation.
Abstract
Computer architecture design space is vast and complex. Tools are needed to explore new ideas and gain insights quickly, with low efforts and at a desired accuracy. We propose Calipers, a criticality-based framework to model key abstractions of complex architectures and a program's execution using dynamic event-dependence graphs. By applying graph algorithms, Calipers can track instruction and event dependencies, compute critical paths, and analyze architecture bottlenecks. By manipulating the graph, Calipers enables architects to investigate a wide range of Instruction Set Architecture (ISA) and microarchitecture design choices/"what-if" scenarios during both early- and late-stage design space exploration without recompiling and rerunning the program. Calipers can model in-order and out-of-order microarchitectures, structural hazards, and different types of ISAs, and can evaluate…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Software System Performance and Reliability · Radiation Effects in Electronics
