FARSI: Facebook AR System Investigator for Agile Domain-Specific System-on-Chip Exploration

TL;DR

FARSI is an agile, high-speed system-level exploration framework for complex domain-specific SoCs, significantly reducing design time and complexity through innovative heuristics and co-design strategies.

Contribution

This paper introduces FARSI, a novel system-level exploration tool that combines fast simulation, efficient heuristics, and co-design capabilities for DSSoC development.

Findings

FARSI achieves 8,400X speedup and 98.5% accuracy over Synopsys Platform Architect.

It improves convergence time by up to 16X compared to naive simulated annealing.

Co-design features reduce system complexity and development costs significantly.

Abstract

Domain-specific SoCs (DSSoCs) are attractive solutions for domains with stringent power/performance/area constraints; however, they suffer from two fundamental complexities. On the one hand, their many specialized hardware blocks result in complex systems and thus high development effort. On the other, their many system knobs expand the complexity of design space, making the search for the optimal design difficult. Thus to reach prevalence, taming such complexities is necessary. This work identifies necessary features of an early-stage design space exploration (DSE) framework that targets the complex design space of DSSoCs and further provides an instance of one called FARSI, (F)acebook (AR) (S)ystem (I)nvestigator. Concretely, FARSI provides an agile system-level simulator with speed up and accuracy of 8,400X and 98.5% comparing to Synopsys Platform Architect. FARSI also provides an efficient exploration heuristic and achieves up to 16X improvementin convergence time comparing to naive simulated annealing (SA). This is done by augmenting SA with architectural reasoning such as locality exploitation and bottleneck relaxation. Furthermore, we embed various co-design capabilities and show that on average, they have a 32% impact on the convergence rate. Finally, we demonstrate that using simple development-cost-aware policies can lower the system complexity, both in terms of the component count and variation by as much as 150% and 118% (e,g., for Network-on-a-Chip subsystem)