Passivity-based design and analysis of phase-locked loops

TL;DR

This paper develops passivity-based PLL algorithms for grid-connected converters, ensuring stability and robustness in high and low inertia grids, validated through a comprehensive benchmark.

Contribution

It introduces passivity-based design methods for PLLs that guarantee stability across different grid inertia conditions, extending conventional solutions.

Findings

Guaranteed stability of PLLs in high-inertia grids

Robustness of algorithms in low-inertia, frequency-varying grids

Validation on a comprehensive grid-VSC benchmark

Abstract

We consider a grid-connected voltage source converter (VSC) and address the problem of estimating the grid angle and frequency, information that is essential for an appropriate operation of the converter. We design phase-locked loop (PLL) algorithms with guaranteed stability properties, under the assumption that the grid is characterized by relatively high short-circuit-ratio (SCR) and inertia. In particular we derive, using passivity arguments, generalization of the conventional synchronous reference frame (SRF) and arctangent (ATAN) PLL, which are the standard solutions in power applications. The analysis is further extended to the case of connection of the VSC to a low-inertia grid, ensuring robustness of the algorithms in case of frequency variations. The results are validated on a benchmark including the grid, the VSC and related controllers.