Asynchronous Memory Access Unit for General Purpose Processors

TL;DR

This paper proposes an in-core asynchronous memory access unit designed to improve the efficiency of general-purpose processors when accessing far memory with high latency variability, common in future data center applications.

Contribution

It introduces a novel in-core asynchronous memory access unit to better handle high-latency far memory accesses in general-purpose processors.

Findings

Reduces memory access latency in high-latency scenarios

Improves processor efficiency with asynchronous memory handling

Demonstrates potential for data center applications

Abstract

In future data centers, applications will make heavy use of far memory (including disaggregated memory pools and NVM). The access latency of far memory is more widely distributed than that of local memory accesses. This makes the efficiency of traditional blocking load/store in most general-purpose processors decrease in this scenario. Therefore, this work proposes an in-core asynchronous memory access unit.