A Survey of Near-Data Processing Architectures for Neural Networks

TL;DR

This survey reviews recent near-data processing architectures for neural networks, highlighting their design techniques, underlying memory technologies, challenges, and future research directions to improve efficiency in data-intensive AI workloads.

Contribution

It classifies NDP techniques based on memory technology and discusses open challenges and future perspectives in neural network accelerators.

Findings

Memory technologies like ReRAM and 3D-stacked enable efficient NDP architectures.

NDP architectures reduce data movement and energy consumption in neural network processing.

Open challenges include scalability, programmability, and integration with existing systems.

Abstract

Data-intensive workloads and applications, such as machine learning (ML), are fundamentally limited by traditional computing systems based on the von-Neumann architecture. As data movement operations and energy consumption become key bottlenecks in the design of computing systems, the interest in unconventional approaches such as Near-Data Processing (NDP), machine learning, and especially neural network (NN)-based accelerators has grown significantly. Emerging memory technologies, such as ReRAM and 3D-stacked, are promising for efficiently architecting NDP-based accelerators for NN due to their capabilities to work as both: High-density/low-energy storage and in/near-memory computation/search engine. In this paper, we present a survey of techniques for designing NDP architectures for NN. By classifying the techniques based on the memory technology employed, we underscore their similarities and differences. Finally, we discuss open challenges and future perspectives that need to be explored in order to improve and extend the adoption of NDP architectures for future computing platforms. This paper will be valuable for computer architects, chip designers and researchers in the area of machine learning.