Dijkstra-Through-Time: Ahead of time hardware scheduling method for deterministic workloads

TL;DR

The paper introduces Dijkstra-Through-Time, a pre-runtime scheduling algorithm for deterministic workloads in ML accelerators, merging scheduling with cache coherence to optimize data flows despite long compile times.

Contribution

It presents a novel ahead-of-time scheduling method that integrates compute and memory management for deterministic workloads, supporting complex hardware configurations.

Findings

Supports complex NoC configurations

Merges scheduling with cache coherence mechanisms

Provides a proof of concept implementation

Abstract

Most of the previous works on data flow optimizations for Machine Learning hardware accelerators try to find algorithmic re-factorization such as loop-reordering and loop-tiling. However, the analysis and information they provide are still at very high level and one must further map them onto instructions that hardware can understand. This paper presents "Dijkstra-Through-Time" (DTT), an ahead of time compute and memory scheduling-mapping algorithm for deterministic workloads. It provides a simple implementation and supports accelerators with complex NoC configurations, at the expense of a long compilation process. This initial paper illustrates a proof of concept implementation to merge scheduling and data cache coherence mechanisms to get more optimized data flows.