TL;DR
This paper demonstrates that P4-programmable hardware like Intel Tofino can effectively track the QUIC spin bit at line-rate, enabling passive RTT measurement while addressing hardware limitations and measurement accuracy challenges.
Contribution
It shows that core spin bit tracking can be implemented on P4 hardware with high accuracy, and discusses handling measurement issues like reordering and RTT classification.
Findings
Hardware tracking achieves near software accuracy
Protection against faulty measurements is feasible
Challenges remain with QUIC connection ID handling
Abstract
QUIC offers security and privacy for modern web traffic by closely integrating encryption into its transport functionality. In this process, it hides transport layer information often used for network monitoring, thus obsoleting traditional measurement concepts. To still enable passive RTT estimations, QUIC introduces a dedicated measurement bit - the spin bit. While simple in its design, tracking the spin bit at line-rate can become challenging for software-based solutions. Dedicated hardware trackers are also unsuitable as the spin bit is not invariant and can change in the future. Thus, this paper investigates whether P4-programmable hardware, such as the Intel Tofino, can effectively track the spin bit at line-rate. We find that the core functionality of the spin bit can be realized easily, and our prototype has an accuracy close to software-based trackers. Our prototype further…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Code & Models
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
