Simulation platform for pattern recognition based on reservoir computing with memristor networks

TL;DR

This paper presents a simulation platform for memristor-based reservoir computing systems, demonstrating high performance and robustness in pattern recognition tasks, guiding future energy-efficient hardware design.

Contribution

It introduces a versatile simulation platform for memristor reservoir computing, enabling systematic testing and optimization of system architectures for improved pattern recognition performance.

Findings

Memristor networks achieve performance comparable to state-of-the-art methods.

Proper design enhances robustness despite device variability.

Simulation guides energy-efficient hardware development.

Abstract

Memristive systems and devices are potentially available for implementing reservoir computing (RC) systems applied to pattern recognition. However, the computational ability of memristive RC systems depends on intertwined factors such as system architectures and physical properties of memristive elements, which complicates identifying the key factor for system performance. Here we develop a simulation platform for RC with memristor device networks, which enables testing different system designs for performance improvement. Numerical simulations show that the memristor-network-based RC systems can yield high computational performance comparable to that of state-of-the-art methods in three time series classification tasks. We demonstrate that the excellent and robust computation under device-to-device variability can be achieved by appropriately setting network structures, nonlinearity of memristors, and pre/post-processing, which increases the potential for reliable computation with unreliable component devices. Our results contribute to an establishment of a design guide for memristive reservoirs toward a realization of energy-efficient machine learning hardware.