PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability

TL;DR

PERCIVAL is an open-source RISC-V core that natively supports posit arithmetic, including quire operations, enabling more accurate computations with comparable performance to traditional floating-point units.

Contribution

This work introduces PERCIVAL, the first hardware implementation of a complete posit instruction set integrated into a RISC-V core, including quire support, enhancing accuracy and scalability.

Findings

Posit support with quire improves dot product accuracy.

Posits achieve up to 4 orders of magnitude lower error in matrix multiplication.

Performance of posits is comparable to single-precision floats.

Abstract

The posit representation for real numbers is an alternative to the ubiquitous IEEE 754 floating-point standard. In this work, we present PERCIVAL, an application-level posit capable RISC-V core based on CVA6 that can execute all posit instructions, including the quire fused operations. This solves the obstacle encountered by previous works, which only included partial posit support or which had to emulate posits in software, thus limiting the scope or the scalability of their applications. In addition, Xposit, a RISC-V extension for posit instructions is incorporated into LLVM. Therefore, PERCIVAL is the first work that integrates the complete posit instruction set in hardware. These elements allow for the native execution of posit instructions as well as the standard floating-point ones, further permitting the comparison of these representations. FPGA and ASIC synthesis show the hardware cost of implementing 32-bit posits and highlight the significant overhead of including a quire accumulator. However, results comparing posits and IEEE floats show that the quire enables a more accurate execution of dot products. In general matrix multiplications, the accuracy error is reduced up to 4 orders of magnitude when compared with single-precision floats. Furthermore, performance comparisons show that these accuracy improvements do not hinder their execution, as posits run as fast as single-precision floats and exhibit better timing than double-precision floats, thus potentially providing an alternative representation.