Mapping Surface Code to Superconducting Quantum Processors

TL;DR

This paper presents a comprehensive framework for mapping surface codes onto superconducting quantum processors, optimizing qubit layout, bridge qubit reduction, and syndrome extraction scheduling to improve error correction efficiency.

Contribution

The paper introduces a novel synthesis framework with three key optimizations for effective surface code mapping on superconducting devices.

Findings

Reduces syndrome extraction overhead

Minimizes bridge qubit conflicts

Decreases total error detection cycle time

Abstract

In this paper, we formally describe the three challenges of mapping surface code on superconducting devices, and present a comprehensive synthesis framework to overcome these challenges. The proposed framework consists of three optimizations. First, we adopt a geometrical method to allocate data qubits which ensures the existence of shallow syndrome extraction circuit. The proposed data qubit layout optimization reduces the overhead of syndrome extraction and serves as a good initial point for following optimizations. Second, we only use bridge qubits enclosed by data qubits and reduce the number of bridge qubits by merging short path between data qubits. The proposed bridge qubit optimization reduces the probability of bridge qubit conflicts and further minimizes the syndrome extraction overhead. Third, we propose an efficient heuristic to schedule syndrome extractions. Based on the proposed data qubit allocation, we devise a good initial schedule of syndrome extractions and further refine this schedule to minimize the total time needed by a complete surface code error detection cycle. Our experiments on mainsstream superconducting quantum architectures have demonstrated the efficiency of the proposed framework.