A Sub-Picosecond Digitally-Controlled Phase Delay

TL;DR

This paper presents a digitally controlled phase shifter capable of achieving sub-picosecond accuracy in timing control, crucial for precision measurements at high-energy physics experiments like the HL-LHC.

Contribution

The authors fabricated a 65 nm process-based phase shifter with 66 cells, achieving 200 fs phase control precision and a 12 ps dynamic range.

Findings

Achieved 200 fs phase control precision.

Demonstrated a 12 ps dynamic range.

Fabricated in TSMC 65 nm process.

Abstract

The use of precision timing measurements will be a major tool at the HL-LHC, where it will be used to suppress pile-up and to search for long-lived particles. To control a reference clock with sub-picosecond accuracy, we have fabricated in the TSMC 65 nm process a digitally controlled phase shifter. It is composed of a chain of 66 cells, each with a digitally controlled planar wave guide with either a short or long delay. With this a reference clock's phase can be controlled to a precision of 200 fs with dynamic range of 12 ps.