Machine Learning for Real-Time Processing of ATLAS Liquid Argon Calorimeter Signals with FPGAs

TL;DR

This paper explores the use of FPGA-implemented machine learning models, specifically convolutional and recurrent neural networks, to improve real-time energy reconstruction in ATLAS liquid-argon calorimeters amidst high pileup conditions at the LHC.

Contribution

It introduces FPGA-based neural network approaches that outperform traditional signal filtering for energy reconstruction in high pileup scenarios at the LHC.

Findings

Neural networks outperform optimal signal filters in energy assignment and resolution.

FPGA implementations closely match software results, ensuring real-time feasibility.

Resource usage and latency are effectively managed in FPGA deployment.

Abstract

The ATLAS experiment at CERN measures energy of proton-proton (p-p) collisions with a repetition frequency of 40 MHz at the Large Hadron Collider (LHC). The readout electronics of liquid-argon (LAr) calorimeters are being prepared for high luminosity-LHC (HL-LHC) operation as part of the phase-II upgrade, anticipating a pileup of up to 200 simultaneous p-p interactions. The increase of the number of p-p interactions implies that calorimeter signals of up to 25 consecutive collisions overlap, making energy reconstruction more challenging. In order to achieve the goal of the HL-HLC, field-programmable gate arrays (FPGAs) are used to process digitized pulses sampled at 40 MHz in real time and different machine learning approaches are being investigated to deal with signal pileup. The convolutional and recurrent neural networks outperform the optimal signal filter currently in use, both in terms of assigning the reconstructed energy to the correct proton bunch crossing and in terms of energy resolution. The enhancements are focused on energy obtained from overlapping pulses. Because the neural networks are implemented on an FPGA, the number of parameters, resource usage, latency and operation frequency must be carefully analysed. A very good agreement is observed between neural network implementations in FPGA and software.