Ultra-Low-Power IoT Communications: A novel address decoding approach for wake-up receivers

TL;DR

This paper introduces a novel ultra-low-power address decoding method for wake-up receivers in IoT devices, significantly reducing energy consumption while maintaining reliable performance, thereby enhancing IoT network longevity.

Contribution

The paper presents a new low-power, reliable address decoder design that outperforms existing solutions in energy efficiency for IoT wake-up receivers.

Findings

Decoder consumes only 60 nW of power.

Decoding delay increase is negligible.

Energy analysis shows significant energy savings in IoT networks.

Abstract

Providing energy-efficient Internet of Things (IoT) connectivity has attracted significant attention in fifth-generation (5G) wireless networks and beyond. A potential solution for realizing a long-lasting network of IoT devices is to equip each IoT device with a wake-up receiver (WuR) to have always-accessible devices instead of always-on devices. WuRs typically comprise a radio frequency demodulator, sequence decoder, and digital address decoder and are provided with a unique authentication address in the network. Although the literature on efficient demodulators is mature, it lacks research on fast, low-power, and reliable address decoders. As this module continuously monitors the received ambient energy for potential paging of the device, its contribution to WuR's power consumption is crucial. Motivated by this need, a low-power, reliable address decoder is developed in this paper. We further investigate the integration of WuR in low-power uplink/downlink communications and, using system-level energy analysis; we characterize operation regions in which WuR can contribute significantly to energy saving. The device-level energy analysis confirms the superior performance of our decoder. The results show that the proposed decoder significantly outperforms the state-of-the-art with a power consumption of 60 nW, at cost of compromising a negligible increase in decoding delay.