G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators

TL;DR

This paper introduces G-GPU, a fully-automated generator for GPU-like ASIC accelerators that are energy-efficient and high-performance, filling a gap in automated ASIC accelerator design tools.

Contribution

The paper presents GPUPlanner, an open-source tool for automated generation of G-GPU accelerators from RTL to GDSII, enabling efficient design space exploration and tapeout-ready layouts.

Findings

G-GPU designs achieve up to 223x speed-up over RISC-V.

Automated generation significantly reduces design complexity.

Layouts are tapeout-ready in 65nm CMOS.

Abstract

Modern Systems on Chip (SoC), almost as a rule, require accelerators for achieving energy efficiency and high performance for specific tasks that are not necessarily well suited for execution in standard processing units. Considering the broad range of applications and necessity for specialization, the design of SoCs has thus become expressively more challenging. In this paper, we put forward the concept of G-GPU, a general-purpose GPU-like accelerator that is not application-specific but still gives benefits in energy efficiency and throughput. Furthermore, we have identified an existing gap for these accelerators in ASIC, for which no known automated generation platform/tool exists. Our solution, called GPUPlanner, is an open-source generator of accelerators, from RTL to GDSII, that addresses this gap. Our analysis results show that our automatically generated G-GPU designs are remarkably efficient when compared against the popular CPU architecture RISC-V, presenting speed-ups of up to 223 times in raw performance and up to 11 times when the metric is performance derated by area. These results are achieved by executing a design space exploration of the GPU-like accelerators, where the memory hierarchy is broken in a smart fashion and the logic is pipelined on demand. Finally, tapeout-ready layouts of the G-GPU in 65nm CMOS are presented.