LW-GCN: A Lightweight FPGA-based Graph Convolutional Network Accelerator
Zhuofu Tao, Chen Wu, Yuan Liang, and Lei He

TL;DR
LW-GCN is a novel FPGA-based accelerator that efficiently processes graph convolutional networks on resource-limited devices by addressing irregular computation and memory access, achieving significant speedups and power savings.
Contribution
It introduces a lightweight, co-designed FPGA accelerator with a new compression format, data quantization, and workload tiling for GCN inference on edge devices.
Findings
Reduces latency by up to 60x compared to CPU and GPU.
Increases power efficiency by up to 912x.
Achieves 32x speedup and 84x energy savings over NVIDIA Jetson Xavier NX.
Abstract
Graph convolutional networks (GCNs) have been introduced to effectively process non-euclidean graph data. However, GCNs incur large amounts of irregularity in computation and memory access, which prevents efficient use of traditional neural network accelerators. Moreover, existing dedicated GCN accelerators demand high memory volumes and are difficult to implement onto resource limited edge devices. In this work, we propose LW-GCN, a lightweight FPGA-based accelerator with a software-hardware co-designed process to tackle irregularity in computation and memory access in GCN inference. LW-GCN decomposes the main GCN operations into sparse-dense matrix multiplication (SDMM) and dense matrix multiplication (DMM). We propose a novel compression format to balance workload across PEs and prevent data hazards. Moreover, we apply data quantization and workload tiling, and map both SDMM and DMM…
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Taxonomy
TopicsAdvanced Graph Neural Networks · Ferroelectric and Negative Capacitance Devices · Graph Theory and Algorithms
MethodsGraph Convolutional Network · GraphSAGE
