Fermion-Parity-Based Computation and its Majorana-Zero-Mode Implementation

TL;DR

This paper proposes fermion-parity-based computation (FPBC), a measurement-driven approach using Majorana zero modes that enhances quantum computational capabilities without requiring physical braiding, addressing hardware constraints.

Contribution

The paper introduces FPBC, a novel measurement-based fermionic quantum computation scheme that increases MZM utility and proposes a hardware-compatible design for parity measurements.

Findings

FPBC enables virtual increase of MZMs using classical processing.

A hardware-compatible design for direct parity measurement is proposed.

Identification of the logical braid group as the fermionic analog of the Clifford group.

Abstract

Majorana zero modes (MZMs) promise a platform for topologically protected fermionic quantum computation. However, creating multiple MZMs and generating (directly or via measurements) the requisite transformations (e.g., braids) pose significant challenges. We introduce fermion-parity-based computation (FPBC): a measurement-based scheme, modeled on Pauli-based computation, that uses efficient classical processing to virtually increase the number of available MZMs and which, given magic state inputs, operates without transformations. FPBC requires all MZM parities to be measurable, but this conflicts with constraints in proposed MZM hardware. We thus introduce a design in which all parities are directly measurable and which is hence well suited for FPBC. While developing FPBC, we identify the "logical braid group" as the fermionic analog of the Clifford group.