Investigation of the Imperfect Interface at the Si/GaAs Heterojunction Formed by Ultra-Thin Oxide Interfacial Layer

TL;DR

This study systematically investigates how an ultra-thin oxide layer affects the chemical composition, charge distribution, and transport properties at the Si/GaAs heterojunction, revealing that surface oxidation degrades heterostructure performance.

Contribution

It provides detailed atomic-level analysis of the oxidation process and its impact on heterojunction properties, highlighting the effects of native oxide formation on device performance.

Findings

Native oxide formation causes unwanted GaAs oxidation.

Oxidation degrades thermal and transport properties.

Poor surface passivation leads to severe heterostructure deterioration.

Abstract

The structure property of non-ideal Si/GaAs heterostructures that were integrated with the ultra-thin oxide (UO) tunneling interfacial layer has been systematically investigated. Si nanomembranes (NMs) were oxidized in different time periods prior to the hetero-integration process to create the non-ideal single-side passivated Si/GaAs heterostructure. The atomic level oxygen distribution and the degree of oxygen content in Si NM and GaAs were carefully investigated using the atom probe tomography (APT) and X-ray photoelectron spectroscopy (XPS) to trace the changes in chemical composition and reactional mechanism across the UO interface when the surface of Si NM was exposed to air for different period of time. The negatively induced charges at the UO layer caused the oxygen diffusion to GaAs layer and formed the unwanted GaAs oxide layer. This native oxide stack noticeably degraded the thermal properties of the Si/GaAs heterostructure as Si NMs were more oxidized. This study revealed that the poor surface passivation on the one side of the heterointerface leads to a both-side oxidation, thus severely deteriorating the transport properties across the heterojunction that is formed with the UO layer.