Design and testing of an sTGC ASIC interface board for the ATLAS New Small Wheel upgrade

TL;DR

This paper presents the design and testing of a specialized ASIC interface board for the sTGC detectors in the ATLAS New Small Wheel upgrade, enabling system validation and communication testing.

Contribution

It introduces a custom ASIC interface board and demonstrates the complete sTGC readout chain for the first time in this context.

Findings

Successful validation of ASIC-to-ASIC communication

Demonstration of the full sTGC readout chain

Key parameter analysis of the readout system

Abstract

The ATLAS experiment will replace the present Small Wheel (SW) detector with a New Small Wheel detector (NSW) aiming to improve the performance of muon triggering and precision tracking in the endcap region at the High-Luminosity LHC. Small-strip Thin Gap Chamber (sTGC) is one of the two new detector technologies used in this upgrade. A few custom-designed ASICs are needed for the sTGC detector. We designed an sTGC ASIC interface board to test ASIC-to-ASIC communication and validate the functionality of the entire system. A test platform with the final readout system is set up and the whole sTGC readout chain is demonstrated for the first time. Key parameters in the readout chain are discussed and the results are shown.