SMX and front-end board tester for CBM readout chain
Wojciech M. Zabo{\l}otny, David Emschermann, Marek Gumi\'nski,, Micha{\l} Kruszewski, J\"org Lehnert, Piotr Miedzik, Krzysztof Po\'zniak,, Ryszard Romaniuk, Christian J. Schmidt
TL;DR
This paper presents a testing system for the SMX ASIC and front-end boards used in the CBM experiment, ensuring quality control through a flexible FPGA-based tester with software integration.
Contribution
It introduces a standalone FPGA-based tester for SMX chips and front-end boards, facilitating comprehensive functional testing in the CBM experiment.
Findings
Enables full functional testing of SMX and front-end boards
Uses a standard FPGA module with simple baseboard
Software is easily integrable with higher-level testing tools
Abstract
The STS-MUCH-XYTER (SMX) chip is a front-end ASIC dedicated to the readout of Silicon Tracking System (STS) and Muon Chamber (MUCH) detectors in the Compressed Baryonic Matter (CBM) experiment. The production of the ASIC and the front-end boards based on it is just being started and requires thorough testing to assure quality. The paper describes the SMX tester based on a standard commercial Artix-7 FPGA module with an additional simple baseboard. In the standalone configuration, the tester is controlled via IPbus and enables full functional testing of connected SMX, front-end board (FEB), or a full detector module. The software written in Python may easily be integrated with higher-level testing software.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsParticle Detector Development and Performance · Particle physics theoretical and experimental studies · High-Energy Particle Collisions Research