MoRS: An Approximate Fault Modelling Framework for Reduced-Voltage SRAMs
\.Ismail Emir Y\"uksel, Behzad Salami, O\u{g}uz Ergin, Osman Sabri, \"Unsal, Adrian Cristal Kestelman

TL;DR
MoRS is a novel fault modeling framework for undervolted SRAMs that accurately simulates faults in DNN accelerators, enabling energy-efficient memory design without extensive real fault testing.
Contribution
MoRS introduces the first approximate undervolting fault model based on real fault data, reducing experimental overhead while maintaining high accuracy.
Findings
MoRS achieves a maximum fault model difference of 6.21% from real faults.
MoRS outperforms random fault injection by 3.21 times in proximity to real data.
The framework effectively evaluates system resilience under undervolting faults.
Abstract
On-chip memory (usually based on Static RAMs-SRAMs) are crucial components for various computing devices including heterogeneous devices, e.g., GPUs, FPGAs, ASICs to achieve high performance. Modern workloads such as Deep Neural Networks (DNNs) running on these heterogeneous fabrics are highly dependent on the on-chip memory architecture for efficient acceleration. Hence, improving the energy-efficiency of such memories directly leads to an efficient system. One of the common methods to save energy is undervolting i.e., supply voltage underscaling below the nominal level. Such systems can be safely undervolted without incurring faults down to a certain voltage limit. This safe range is also called voltage guardband. However, reducing voltage below the guardband level without decreasing frequency causes timing-based faults. In this paper, we propose MoRS, a framework that generates the…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Radiation Effects in Electronics · Advanced Neural Network Applications
