Topology-optimized ultra-compact all-optical logic devices on silicon photonic platforms

TL;DR

This paper demonstrates ultra-compact all-optical logic devices on silicon photonic platforms using topology optimization, achieving the smallest verified dielectric logic gates with low signal loss, paving the way for practical optical computing.

Contribution

It introduces a novel topology optimization method to create the smallest all-optical logic devices on silicon, including integrated chips with multiple logic functions.

Findings

Fabricated all-optical XOR and OR gates with 1.3x1.3 μm² footprint.

Achieved ultra-low optical signal loss of -0.96dB.

Created an integrated chip with seven logic gates and a half adder within 1.3x4.5 μm².

Abstract

The realization of all-optical integration and optical computing has always been our goal. One of the most significant challenges is to make integrated all-optical logic devices as small as possible. Here, we report the implementation of ultra-compact all-optical logic devices and integrated chips on silicon photonic platforms by topology optimization. The footprint for the fabricated all-optical logic gates with XOR and OR functions is only 1.3*1.3 {\mu}m2 (~0.84{\lambda}*0.84{\lambda}), that are the smallest all-optical dielectric logic devices ever verified in experiments in the optical communication range. The ultra-low loss of the optical signal is also demonstrated experimentally (-0.96dB). Furthermore, an integrated chip containing seven major logic gates (AND, OR, NOT, NAND, NOR, XOR, and XNOR) and a half adder is fabricated, where the associated footprint is only 1.3*4.5 {\mu}m2. Our work opens up a new path towards practical all-optical integration and optical computing.