Optimization of a CCD-in-CMOS TDI detector's operating clock voltages by Taguchi based Grey relational analysis
Swaraj Bandhu Mahato, Pierre Boulenc

TL;DR
This paper presents an optimization method for CCD-in-CMOS TDI detector clock voltages using Taguchi's DOE and Grey relational analysis to enhance multiple performance parameters efficiently.
Contribution
It introduces a systematic experimental design approach combining Taguchi's method and Grey relational analysis for multi-parameter optimization of detector voltages.
Findings
Optimized clock voltages improved detector performance.
The method reduced experimental trials needed for optimization.
Enhanced multiple parameters simultaneously with a single optimal voltage set.
Abstract
In recent years, CCD-in-CMOS TDI image sensors are becoming increasingly popular for many small satellite missions to assure a fast and affordable access to space for Low Earth Observation. Our monolithic CCD-in-CMOS TDI imager features a specifically developed technology which combines the benefits of a classical CCD TDI with the advantages of CMOS System-On-a-Chip (SoC) design. Like CCD, this detector is also controlled by a large number of clock voltages. Optimizing these voltages allows to increase the performance of the detector by improving multiple characteristic parameters, such as full well capacity (FWC), dark current, linearity, dark signal non-uniformity (DSNU) and charge transfer efficiency (CTE). Traditionally, it has been the standard practice to adjust the CCD voltages by trial and error methods to get a better image. Because of the large parameter space, such subjective…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
