On the Hardness of the Determinant: Sum of Regular Set-Multilinear Circuits
S Raja, Sumukha Bharadwaj G V

TL;DR
This paper investigates the computational complexity of the determinant polynomial within a specific class of structured circuits, revealing implications for the complexity of the permanent polynomial.
Contribution
It introduces regular set-multilinear circuits and establishes a connection between their small representations of the determinant and the complexity of the permanent.
Findings
Small sum-of-regular set-multilinear circuits for the determinant imply small circuits for the permanent.
The study links circuit complexity of determinant to that of permanent within this circuit class.
Provides new insights into the hardness of the determinant in structured circuit models.
Abstract
In this paper, we study the computational complexity of the commutative determinant polynomial computed by a class of set-multilinear circuits which we call regular set-multilinear circuits. Regular set-multilinear circuits are commutative circuits with a restriction on the order in which they can compute polynomials. A regular circuit can be seen as the commutative analogue of the ordered circuit defined by Hrubes,Wigderson and Yehudayoff [HWY10]. We show that if the commutative determinant polynomial has small representation in the sum of constantly many regular set-multilinear circuits, then the commutative permanent polynomial also has a small arithmetic circuit.
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Taxonomy
TopicsComplexity and Algorithms in Graphs · Quantum Computing Algorithms and Architecture · Advanced Graph Theory Research
