Making Memristive Processing-in-Memory Reliable

TL;DR

This paper addresses the reliability challenges of memristive processing-in-memory systems by proposing ECC and TMR techniques that leverage the same principles as the mMPU's computation, ensuring high-throughput error resilience.

Contribution

It introduces novel reliability techniques tailored for memristive PIM, utilizing the device's properties to enable efficient error correction and redundancy.

Findings

ECC techniques based on mMPU properties improve error correction efficiency.

Novel TMR implementations enhance system reliability.

Reliability mechanisms are crucial for large-scale neural network applications.

Abstract

Processing-in-memory (PIM) solutions vastly accelerate systems by reducing data transfer between computation and memory. Memristors possess a unique property that enables storage and logic within the same device, which is exploited in the memristive Memory Processing Unit (mMPU). The mMPU expands fundamental stateful logic techniques, such as IMPLY, MAGIC and FELIX, to high-throughput parallel logic and arithmetic operations within the memory. Unfortunately, memristive processing-in-memory is highly vulnerable to soft errors and this massive parallelism is not compatible with traditional reliability techniques, such as error-correcting-code (ECC). In this paper, we discuss reliability techniques that efficiently support the mMPU by utilizing the same principles as the mMPU computation. We detail ECC techniques that are based on the unique properties of the mMPU to efficiently utilize the massive parallelism. Furthermore, we present novel solutions for efficiently implementing triple modular redundancy (TMR). The short-term and long-term reliability of large-scale applications, such as neural-network acceleration, are evaluated. The analysis clearly demonstrates the importance of high-throughput reliability mechanisms for memristive processing-in-memory.