Scaling Up Silicon Photonic-based Accelerators: Challenges and Opportunities

TL;DR

This paper examines the potential of silicon photonic accelerators to significantly increase the speed and efficiency of MAC operations, highlighting current limitations and future research directions for scalable optical networks.

Contribution

It provides an analysis of energy efficiency bounds and scaling limits for silicon photonic MAC circuits and discusses strategies to overcome current technological challenges.

Findings

Optical MAC operations can reach tens of GHz, vastly surpassing electronic speeds.

Current silicon photonic networks face energy and scaling limitations.

Research directions are proposed to enhance scalability and efficiency.

Abstract

Digital accelerators in the latest generation of CMOS processes support multiply and accumulate (MAC) operations at energy efficiencies spanning 10-to-100~fJ/Op. But the operating speed for such MAC operations are often limited to a few hundreds of MHz. Optical or optoelectronic MAC operations on today's SOI-based silicon photonic integrated circuit platforms can be realized at a speed of tens of GHz, leading to much lower latency and higher throughput. In this paper, we study the energy efficiency of integrated silicon photonic MAC circuits based on Mach-Zehnder modulators and microring resonators. We describe the bounds on energy efficiency and scaling limits for NxN optical networks with today's technology, based on the optical and electrical link budget. We also describe research directions that can overcome the current limitations.