CeMux: Maximizing the Accuracy of Stochastic Mux Adders and an Application to Filter Design

TL;DR

CeMux introduces a novel stochastic mux adder that significantly improves accuracy and reduces area in digital filter applications by mitigating key error sources through precise sampling and correlation techniques.

Contribution

The paper presents CeMux, a new correlation-enhanced multiplexer design that outperforms traditional mux adders in accuracy and area efficiency for stochastic computing.

Findings

CeMux achieves 4x to 16x latency reduction compared to other designs.

CeMux uses about 35% less area than existing stochastic mux adders.

A small accuracy trade-off can further halve the area requirement.

Abstract

Stochastic computing (SC) is a low-cost computational paradigm that has promising applications in digital filter design, image processing and neural networks. Fundamental to these applications is the weighted addition operation which is most often implemented by a multiplexer (mux) tree. Mux-based adders have very low area but typically require long bit-streams to reach practical accuracy thresholds when the number of summands is large. In this work, we first identify the main contributors to mux adder error. We then demonstrate with analysis and experiment that two new techniques, precise sampling and full correlation, can target and mitigate these error sources. Implementing these techniques in hardware leads to the design of CeMux (Correlation-enhanced Multiplexer), a stochastic mux adder that is significantly more accurate and uses much less area than traditional weighted adders. We compare CeMux to other SC and hybrid designs for an electrocardiogram filtering case study that employs a large digital filter. One major result is that CeMux is shown to be accurate even for large input sizes. CeMux's higher accuracy leads to a latency reduction of 4x to 16x over other designs. Further, CeMux uses about 35% less area than existing designs, and we demonstrate that a small amount of accuracy can be traded for a further 50% reduction in area. Finally, we compare CeMux to a conventional binary design and we show that CeMux can achieve a 50 to 73% area reduction for similar power and latency as the conventional design, but at a slightly higher level of error.