METRO: A Software-Hardware Co-Design of Interconnections for Spatial DNN Accelerators

TL;DR

This paper introduces METRO, a software-hardware co-designed interconnection system for spatial DNN accelerators, significantly improving communication efficiency and processing time over traditional on-chip networks.

Contribution

It proposes a novel decoupled software-hardware co-design approach for interconnection networks in spatial DNN accelerators, enhancing performance and resource utilization.

Findings

Achieves 56.3% average communication speedup

Reduces overall processing time by up to 73.6%

Effective across various DNN models and hardware constraints

Abstract

Tiled spatial architectures have proved to be an effective solution to build large-scale DNN accelerators. In particular, interconnections between tiles are critical for high performance in these tile-based architectures. In this work, we identify the inefficiency of the widely used traditional on-chip networks and the opportunity of software-hardware co-design. We propose METRO with the basic idea of decoupling the traffic scheduling policies from hardware fabrics and moving them to the software level. METRO contains two modules working in synergy: METRO software scheduling framework to coordinate the traffics and METRO hardware facilities to deliver the data based on software configurations. We evaluate the co-design using different flit sizes for synthetic study, illustrating its effectiveness under various hardware resource constraints, in addition to a wide range of DNN models selected from real-world workloads. The results show that METRO achieves 56.3% communication speedup on average and up to 73.6% overall processing time reduction compared with traditional on-chip network designs.