Theoretical Analysis and Evaluation of NoCs with Weighted Round-Robin Arbitration

TL;DR

This paper introduces a novel performance analysis method for NoCs with weighted round-robin arbitration, enabling accurate early-stage evaluation of on-chip communication in many-core processors.

Contribution

It presents the first analytical technique specifically designed for weighted round-robin arbitration in NoCs, estimating packet service and waiting times with high accuracy.

Findings

Achieves less than 5% error on real applications

Maintains under 10% error with synthetic traffic

Extends to NoCs of any size using decomposition

Abstract

Fast and accurate performance analysis techniques are essential in early design space exploration and pre-silicon evaluations, including software eco-system development. In particular, on-chip communication continues to play an increasingly important role as the many-core processors scale up. This paper presents the first performance analysis technique that targets networks-on-chip (NoCs) that employ weighted round-robin (WRR) arbitration. Besides fairness, WRR arbitration provides flexibility in allocating bandwidth proportionally to the importance of the traffic classes, unlike basic round-robin and priority-based arbitration. The proposed approach first estimates the effective service time of the packets in the queue due to WRR arbitration. Then, it uses the effective service time to compute the average waiting time of the packets. Next, we incorporate a decomposition technique to extend the analytical model to handle NoC of any size. The proposed approach achieves less than 5% error while executing real applications and 10% error under challenging synthetic traffic with different burstiness levels.